From d3a0cc3a8ba6dfeb64d3faeffdeb6845b60e5840 Mon Sep 17 00:00:00 2001
From: Yuchen Pei <me@ypei.me>
Date: Sat, 20 Jan 2018 15:41:49 +0100
Subject: rearranged the dir for github

- removed tools and pdfs
- rearranged the projects dirs
- added md files
- other minor changes
---
 chips/ALU.hdl        | 62 +++++++++++++++++++++++++++++++++++++++
 chips/Add16.hdl      | 33 +++++++++++++++++++++
 chips/And.hdl        | 20 +++++++++++++
 chips/And16.hdl      | 33 +++++++++++++++++++++
 chips/And1With16.hdl | 22 ++++++++++++++
 chips/Bit.hdl        | 21 ++++++++++++++
 chips/CPU.hdl        | 82 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 chips/Computer.hdl   | 26 +++++++++++++++++
 chips/DMux.hdl       | 21 ++++++++++++++
 chips/DMux4Way.hdl   | 23 +++++++++++++++
 chips/DMux8Way.hdl   | 23 +++++++++++++++
 chips/FullAdder.hdl  | 20 +++++++++++++
 chips/HalfAdder.hdl  | 19 ++++++++++++
 chips/Inc16.hdl      | 18 ++++++++++++
 chips/Memory.hdl     | 45 ++++++++++++++++++++++++++++
 chips/Mux.hdl        | 22 ++++++++++++++
 chips/Mux16.hdl      | 34 ++++++++++++++++++++++
 chips/Mux4Way16.hdl  | 23 +++++++++++++++
 chips/Mux8Way16.hdl  | 25 ++++++++++++++++
 chips/Not.hdl        | 18 ++++++++++++
 chips/Not16.hdl      | 33 +++++++++++++++++++++
 chips/Or.hdl         | 21 ++++++++++++++
 chips/Or16.hdl       | 33 +++++++++++++++++++++
 chips/Or8Way.hdl     | 24 +++++++++++++++
 chips/PC.hdl         | 32 ++++++++++++++++++++
 chips/RAM16K.hdl     | 25 ++++++++++++++++
 chips/RAM4K.hdl      | 29 +++++++++++++++++++
 chips/RAM512.hdl     | 29 +++++++++++++++++++
 chips/RAM64.hdl      | 29 +++++++++++++++++++
 chips/RAM8.hdl       | 29 +++++++++++++++++++
 chips/Register.hdl   | 34 ++++++++++++++++++++++
 chips/Xor.hdl        | 22 ++++++++++++++
 32 files changed, 930 insertions(+)
 create mode 100644 chips/ALU.hdl
 create mode 100644 chips/Add16.hdl
 create mode 100644 chips/And.hdl
 create mode 100644 chips/And16.hdl
 create mode 100644 chips/And1With16.hdl
 create mode 100644 chips/Bit.hdl
 create mode 100644 chips/CPU.hdl
 create mode 100644 chips/Computer.hdl
 create mode 100644 chips/DMux.hdl
 create mode 100644 chips/DMux4Way.hdl
 create mode 100644 chips/DMux8Way.hdl
 create mode 100644 chips/FullAdder.hdl
 create mode 100644 chips/HalfAdder.hdl
 create mode 100644 chips/Inc16.hdl
 create mode 100644 chips/Memory.hdl
 create mode 100644 chips/Mux.hdl
 create mode 100644 chips/Mux16.hdl
 create mode 100644 chips/Mux4Way16.hdl
 create mode 100644 chips/Mux8Way16.hdl
 create mode 100644 chips/Not.hdl
 create mode 100644 chips/Not16.hdl
 create mode 100644 chips/Or.hdl
 create mode 100644 chips/Or16.hdl
 create mode 100644 chips/Or8Way.hdl
 create mode 100644 chips/PC.hdl
 create mode 100644 chips/RAM16K.hdl
 create mode 100644 chips/RAM4K.hdl
 create mode 100644 chips/RAM512.hdl
 create mode 100644 chips/RAM64.hdl
 create mode 100644 chips/RAM8.hdl
 create mode 100644 chips/Register.hdl
 create mode 100644 chips/Xor.hdl

(limited to 'chips')

diff --git a/chips/ALU.hdl b/chips/ALU.hdl
new file mode 100644
index 0000000..47697a0
--- /dev/null
+++ b/chips/ALU.hdl
@@ -0,0 +1,62 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/02/ALU.hdl
+
+/**
+ * The ALU (Arithmetic Logic Unit).
+ * Computes one of the following functions:
+ * x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
+ * x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs, 
+ * according to 6 input bits denoted zx,nx,zy,ny,f,no.
+ * In addition, the ALU computes two 1-bit outputs:
+ * if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
+ * if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
+ */
+
+// Implementation: the ALU logic manipulates the x and y inputs
+// and operates on the resulting values, as follows:
+// if (zx == 1) set x = 0        // 16-bit constant
+// if (nx == 1) set x = !x       // bitwise not
+// if (zy == 1) set y = 0        // 16-bit constant
+// if (ny == 1) set y = !y       // bitwise not
+// if (f == 1)  set out = x + y  // integer 2's complement addition
+// if (f == 0)  set out = x & y  // bitwise and
+// if (no == 1) set out = !out   // bitwise not
+// if (out == 0) set zr = 1
+// if (out < 0) set ng = 1
+
+CHIP ALU {
+    IN  
+        x[16], y[16],  // 16-bit inputs        
+        zx, // zero the x input?
+        nx, // negate the x input?
+        zy, // zero the y input?
+        ny, // negate the y input?
+        f,  // compute out = x + y (if 1) or x & y (if 0)
+        no; // negate the out output?
+
+    OUT 
+        out[16], // 16-bit output
+        zr, // 1 if (out == 0), 0 otherwise
+        ng; // 1 if (out < 0),  0 otherwise
+
+    PARTS:
+   // Put you code here:
+    Mux16 (a=x, b[0..15]=false, sel=zx, out=x1);
+    Not16 (in=x1, out=notx1);
+    Mux16 (a=x1, b=notx1, sel=nx, out=x2);
+    Mux16 (a=y, b[0..15]=false, sel=zy, out=y1);
+    Not16 (in=y1, out=noty1);
+    Mux16 (a=y1, b=noty1, sel=ny, out=y2);
+    Add16 (a=x2, b=y2, out=x2py2);
+    And16 (a=x2, b=y2, out=x2ay2);
+    Mux16 (a=x2ay2, b=x2py2, sel=f, out=xy);
+    Not16 (in=xy, out=notxy);
+    Mux16 (a=xy, b=notxy, sel=no, out=out, out[0..7]=out1, out[8..15]=out2, out[15]=msbout);
+    Or8Way (in=out1, out=z1);
+    Or8Way (in=out1, out=z2); //some potential pitfall w.r.t. subbusing see https://www.coursera.org/learn/build-a-computer/discussions/weeks/2/threads/9VYr3LzkEeeK2BJ0oEsgKA
+    Or (a=z1, b=z2, out=z);
+    Not (in=z, out=zr);
+    And (a=msbout, b=true, out=ng);
+}
diff --git a/chips/Add16.hdl b/chips/Add16.hdl
new file mode 100644
index 0000000..ea3cb80
--- /dev/null
+++ b/chips/Add16.hdl
@@ -0,0 +1,33 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/02/Adder16.hdl
+
+/**
+ * Adds two 16-bit values.
+ * The most significant carry bit is ignored.
+ */
+
+CHIP Add16 {
+    IN a[16], b[16];
+    OUT out[16];
+
+    PARTS:
+   // Put you code here:
+   HalfAdder (a=a[0], b=b[0], sum=out[0], carry=carry0);
+   FullAdder (a=a[1], b=b[1], c=carry0, sum=out[1], carry=carry1);
+   FullAdder (a=a[2], b=b[2], c=carry1, sum=out[2], carry=carry2);
+   FullAdder (a=a[3], b=b[3], c=carry2, sum=out[3], carry=carry3);
+   FullAdder (a=a[4], b=b[4], c=carry3, sum=out[4], carry=carry4);
+   FullAdder (a=a[5], b=b[5], c=carry4, sum=out[5], carry=carry5);
+   FullAdder (a=a[6], b=b[6], c=carry5, sum=out[6], carry=carry6);
+   FullAdder (a=a[7], b=b[7], c=carry6, sum=out[7], carry=carry7);
+   FullAdder (a=a[8], b=b[8], c=carry7, sum=out[8], carry=carry8);
+   FullAdder (a=a[9], b=b[9], c=carry8, sum=out[9], carry=carry9);
+   FullAdder (a=a[10], b=b[10], c=carry9, sum=out[10], carry=carry10);
+   FullAdder (a=a[11], b=b[11], c=carry10, sum=out[11], carry=carry11);
+   FullAdder (a=a[12], b=b[12], c=carry11, sum=out[12], carry=carry12);
+   FullAdder (a=a[13], b=b[13], c=carry12, sum=out[13], carry=carry13);
+   FullAdder (a=a[14], b=b[14], c=carry13, sum=out[14], carry=carry14);
+   FullAdder (a=a[15], b=b[15], c=carry14, sum=out[15], carry=carry15);
+}
diff --git a/chips/And.hdl b/chips/And.hdl
new file mode 100644
index 0000000..754e54e
--- /dev/null
+++ b/chips/And.hdl
@@ -0,0 +1,20 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/And.hdl
+
+/**
+ * And gate: 
+ * out = 1 if (a == 1 and b == 1)
+ *       0 otherwise
+ */
+
+CHIP And {
+    IN a, b;
+    OUT out;
+
+    PARTS:
+    // Put your code here:
+    Nand (a=a, b=b, out=nandab);
+    Not (in=nandab, out=out);
+}
diff --git a/chips/And16.hdl b/chips/And16.hdl
new file mode 100644
index 0000000..10c8603
--- /dev/null
+++ b/chips/And16.hdl
@@ -0,0 +1,33 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/And16.hdl
+
+/**
+ * 16-bit bitwise And:
+ * for i = 0..15: out[i] = (a[i] and b[i])
+ */
+
+CHIP And16 {
+    IN a[16], b[16];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    And (a=a[0], b=b[0], out=out[0]);
+    And (a=a[1], b=b[1], out=out[1]);
+    And (a=a[2], b=b[2], out=out[2]);
+    And (a=a[3], b=b[3], out=out[3]);
+    And (a=a[4], b=b[4], out=out[4]);
+    And (a=a[5], b=b[5], out=out[5]);
+    And (a=a[6], b=b[6], out=out[6]);
+    And (a=a[7], b=b[7], out=out[7]);
+    And (a=a[8], b=b[8], out=out[8]);
+    And (a=a[9], b=b[9], out=out[9]);
+    And (a=a[10], b=b[10], out=out[10]);
+    And (a=a[11], b=b[11], out=out[11]);
+    And (a=a[12], b=b[12], out=out[12]);
+    And (a=a[13], b=b[13], out=out[13]);
+    And (a=a[14], b=b[14], out=out[14]);
+    And (a=a[15], b=b[15], out=out[15]);
+}
diff --git a/chips/And1With16.hdl b/chips/And1With16.hdl
new file mode 100644
index 0000000..c6d412c
--- /dev/null
+++ b/chips/And1With16.hdl
@@ -0,0 +1,22 @@
+CHIP And1With16 {
+    IN a, b[16];
+    OUT out[16];
+
+    PARTS:
+    And (a=a, b=b[0], out=out[0]);
+    And (a=a, b=b[1], out=out[1]);
+    And (a=a, b=b[2], out=out[2]);
+    And (a=a, b=b[3], out=out[3]);
+    And (a=a, b=b[4], out=out[4]);
+    And (a=a, b=b[5], out=out[5]);
+    And (a=a, b=b[6], out=out[6]);
+    And (a=a, b=b[7], out=out[7]);
+    And (a=a, b=b[8], out=out[8]);
+    And (a=a, b=b[9], out=out[9]);
+    And (a=a, b=b[10], out=out[10]);
+    And (a=a, b=b[11], out=out[11]);
+    And (a=a, b=b[12], out=out[12]);
+    And (a=a, b=b[13], out=out[13]);
+    And (a=a, b=b[14], out=out[14]);
+    And (a=a, b=b[15], out=out[15]);
+}
diff --git a/chips/Bit.hdl b/chips/Bit.hdl
new file mode 100644
index 0000000..52e0539
--- /dev/null
+++ b/chips/Bit.hdl
@@ -0,0 +1,21 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/a/Bit.hdl
+
+/**
+ * 1-bit register:
+ * If load[t] == 1 then out[t+1] = in[t]
+ *                 else out does not change (out[t+1] = out[t])
+ */
+
+CHIP Bit {
+    IN in, load;
+    OUT out;
+
+    PARTS:
+    // Put your code here:
+    Mux (a=dffout, b=in, sel=load, out=muxout);
+    DFF (in=muxout, out=dffout);
+    Or (a=dffout, b=dffout, out=out);
+}
diff --git a/chips/CPU.hdl b/chips/CPU.hdl
new file mode 100644
index 0000000..aeeac04
--- /dev/null
+++ b/chips/CPU.hdl
@@ -0,0 +1,82 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/05/CPU.hdl
+
+/**
+ * The Hack CPU (Central Processing unit), consisting of an ALU,
+ * two registers named A and D, and a program counter named PC.
+ * The CPU is designed to fetch and execute instructions written in 
+ * the Hack machine language. In particular, functions as follows:
+ * Executes the inputted instruction according to the Hack machine 
+ * language specification. The D and A in the language specification
+ * refer to CPU-resident registers, while M refers to the external
+ * memory location addressed by A, i.e. to Memory[A]. The inM input 
+ * holds the value of this location. If the current instruction needs 
+ * to write a value to M, the value is placed in outM, the address 
+ * of the target location is placed in the addressM output, and the 
+ * writeM control bit is asserted. (When writeM==0, any value may 
+ * appear in outM). The outM and writeM outputs are combinational: 
+ * they are affected instantaneously by the execution of the current 
+ * instruction. The addressM and pc outputs are clocked: although they 
+ * are affected by the execution of the current instruction, they commit 
+ * to their new values only in the next time step. If reset==1 then the 
+ * CPU jumps to address 0 (i.e. pc is set to 0 in next time step) rather 
+ * than to the address resulting from executing the current instruction. 
+ */
+
+CHIP CPU {
+
+    IN  inM[16],         // M value input  (M = contents of RAM[A])
+        instruction[16], // Instruction for execution
+        reset;           // Signals whether to re-start the current
+                         // program (reset==1) or continue executing
+                         // the current program (reset==0).
+
+    OUT outM[16],        // M value output
+        writeM,          // Write to M? 
+        addressM[15],    // Address in data memory (of M)
+        pc[15];          // address of next instruction
+
+    PARTS:
+    // Put your code here:
+
+    Nand(a=instruction[15], b=instruction[5], out=c7);
+    Mux16(a=aluout, b=instruction, sel=c7, out=out1);
+
+    Not(in=instruction[15], out=notd1);
+    Or(a=instruction[5], b=notd1, out=c8);
+    ARegister(in=out1, load=c8, out=out2, out[0..14]=addressM);
+
+    And(a=instruction[15], b=instruction[12], out=c9);
+    Mux16(a=out2, b=inM, sel=c9, out=y);
+
+    And(a=instruction[15], b=instruction[4], out=c10);
+    DRegister(in=aluout, load=c10, out=x);
+
+    ALU(x=x, y=y, zx=instruction[11], nx=instruction[10], zy=instruction[9], ny=instruction[8], f=instruction[7], no=instruction[6], out=aluout, out=outM, ng=ng, zr=zr);
+    Not(in=ng, out=ps);
+    Not(in=zr, out=nz);
+
+    And(a=ps, b=nz, out=out3);
+    And(a=out3, b=instruction[0], out=isjump1);
+
+    And(a=ps, b=zr, out=out4);
+    And(a=out4, b=instruction[1], out=isjump2);
+
+    And(a=ng, b=nz, out=out5);
+    And(a=out5, b=instruction[2], out=isjump3);
+
+    Or(a=isjump1, b=isjump2, out=isjump4);
+    Or(a=isjump3, b=isjump4, out=isjump5);
+    And(a=instruction[15], b=isjump5, out=isjump);
+
+    Not(in=isjump, out=isnotjump);
+
+    PC(in=out2, load=isjump, inc=isnotjump, reset=reset, out[0..14]=pc);
+
+    And(a=instruction[15], b=instruction[3], out=writeM);
+    //And(a=instruction[15], b=instruction[3], out=out6);
+    //DFF(in=out6, out=writeM);
+
+}
diff --git a/chips/Computer.hdl b/chips/Computer.hdl
new file mode 100644
index 0000000..fdda8e3
--- /dev/null
+++ b/chips/Computer.hdl
@@ -0,0 +1,26 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/05/Computer.hdl
+
+/**
+ * The HACK computer, including CPU, ROM and RAM.
+ * When reset is 0, the program stored in the computer's ROM executes.
+ * When reset is 1, the execution of the program restarts. 
+ * Thus, to start a program's execution, reset must be pushed "up" (1)
+ * and "down" (0). From this point onward the user is at the mercy of 
+ * the software. In particular, depending on the program's code, the 
+ * screen may show some output and the user may be able to interact 
+ * with the computer via the keyboard.
+ */
+
+CHIP Computer {
+
+    IN reset;
+
+    PARTS:
+    // Put your code here:
+    CPU(reset=reset, instruction=instruction, inM=inM, writeM=writeM, outM=outM, addressM=addressM, pc=pc);
+    Memory(in=outM, address=addressM, load=writeM, out=inM);
+    ROM32K(address=pc, out=instruction);
+}
diff --git a/chips/DMux.hdl b/chips/DMux.hdl
new file mode 100644
index 0000000..b528313
--- /dev/null
+++ b/chips/DMux.hdl
@@ -0,0 +1,21 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/DMux.hdl
+
+/**
+ * Demultiplexor:
+ * {a, b} = {in, 0} if sel == 0
+ *          {0, in} if sel == 1
+ */
+
+CHIP DMux {
+    IN in, sel;
+    OUT a, b;
+
+    PARTS:
+    // Put your code here:
+    Not (in=sel, out=notsel);
+    And (a=in, b=notsel, out=a);
+    And (a=in, b=sel, out=b);
+}
diff --git a/chips/DMux4Way.hdl b/chips/DMux4Way.hdl
new file mode 100644
index 0000000..18b725d
--- /dev/null
+++ b/chips/DMux4Way.hdl
@@ -0,0 +1,23 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/DMux4Way.hdl
+
+/**
+ * 4-way demultiplexor:
+ * {a, b, c, d} = {in, 0, 0, 0} if sel == 00
+ *                {0, in, 0, 0} if sel == 01
+ *                {0, 0, in, 0} if sel == 10
+ *                {0, 0, 0, in} if sel == 11
+ */
+
+CHIP DMux4Way {
+    IN in, sel[2];
+    OUT a, b, c, d;
+
+    PARTS:
+    // Put your code here:
+    DMux (in=in, sel=sel[1], a=e, b=f);
+    DMux (in=e, sel=sel[0], a=a, b=b);
+    DMux (in=f, sel=sel[0], a=c, b=d);
+}
diff --git a/chips/DMux8Way.hdl b/chips/DMux8Way.hdl
new file mode 100644
index 0000000..6038fa6
--- /dev/null
+++ b/chips/DMux8Way.hdl
@@ -0,0 +1,23 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/DMux8Way.hdl
+
+/**
+ * 8-way demultiplexor:
+ * {a, b, c, d, e, f, g, h} = {in, 0, 0, 0, 0, 0, 0, 0} if sel == 000
+ *                            {0, in, 0, 0, 0, 0, 0, 0} if sel == 001
+ *                            etc.
+ *                            {0, 0, 0, 0, 0, 0, 0, in} if sel == 111
+ */
+
+CHIP DMux8Way {
+    IN in, sel[3];
+    OUT a, b, c, d, e, f, g, h;
+
+    PARTS:
+    // Put your code here:
+    DMux (in=in, sel=sel[2], a=i, b=j);
+    DMux4Way (in=i, sel=sel[0..1], a=a, b=b, c=c, d=d);
+    DMux4Way (in=j, sel=sel[0..1], a=e, b=f, c=g, d=h);
+}
diff --git a/chips/FullAdder.hdl b/chips/FullAdder.hdl
new file mode 100644
index 0000000..451499f
--- /dev/null
+++ b/chips/FullAdder.hdl
@@ -0,0 +1,20 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/02/FullAdder.hdl
+
+/**
+ * Computes the sum of three bits.
+ */
+
+CHIP FullAdder {
+    IN a, b, c;  // 1-bit inputs
+    OUT sum,     // Right bit of a + b + c
+        carry;   // Left bit of a + b + c
+
+    PARTS:
+    // Put you code here:
+    HalfAdder (a=a, b=b, sum=sum1, carry=carry1);
+    HalfAdder (a=sum1, b=c, sum=sum, carry=carry2);
+    Or (a=carry1, b=carry2, out=carry);
+}
diff --git a/chips/HalfAdder.hdl b/chips/HalfAdder.hdl
new file mode 100644
index 0000000..0b40509
--- /dev/null
+++ b/chips/HalfAdder.hdl
@@ -0,0 +1,19 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/02/HalfAdder.hdl
+
+/**
+ * Computes the sum of two bits.
+ */
+
+CHIP HalfAdder {
+    IN a, b;    // 1-bit inputs
+    OUT sum,    // Right bit of a + b 
+        carry;  // Left bit of a + b
+
+    PARTS:
+    // Put you code here:
+    Xor (a=a, b=b, out=sum);
+    And (a=a, b=b, out=carry);
+}
diff --git a/chips/Inc16.hdl b/chips/Inc16.hdl
new file mode 100644
index 0000000..8142695
--- /dev/null
+++ b/chips/Inc16.hdl
@@ -0,0 +1,18 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/02/Inc16.hdl
+
+/**
+ * 16-bit incrementer:
+ * out = in + 1 (arithmetic addition)
+ */
+
+CHIP Inc16 {
+    IN in[16];
+    OUT out[16];
+
+    PARTS:
+   // Put you code here:
+   Add16 (a=in, b[0]=true, b[1..15]=false, out=out);
+}
diff --git a/chips/Memory.hdl b/chips/Memory.hdl
new file mode 100644
index 0000000..6aeb8a0
--- /dev/null
+++ b/chips/Memory.hdl
@@ -0,0 +1,45 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/05/Memory.hdl
+
+/**
+ * The complete address space of the Hack computer's memory,
+ * including RAM and memory-mapped I/O. 
+ * The chip facilitates read and write operations, as follows:
+ *     Read:  out(t) = Memory[address(t)](t)
+ *     Write: if load(t-1) then Memory[address(t-1)](t) = in(t-1)
+ * In words: the chip always outputs the value stored at the memory 
+ * location specified by address. If load==1, the in value is loaded 
+ * into the memory location specified by address. This value becomes 
+ * available through the out output from the next time step onward.
+ * Address space rules:
+ * Only the upper 16K+8K+1 words of the Memory chip are used. 
+ * Access to address>0x6000 is invalid. Access to any address in 
+ * the range 0x4000-0x5FFF results in accessing the screen memory 
+ * map. Access to address 0x6000 results in accessing the keyboard 
+ * memory map. The behavior in these addresses is described in the 
+ * Screen and Keyboard chip specifications given in the book.
+ */
+
+CHIP Memory {
+    IN in[16], load, address[15];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    DMux(in=load, sel=address[14], a=mload, b=load1);
+    DMux(in=load1, sel=address[13], a=sload, b=kload);
+    RAM16K(in=in, load=mload, address=address[0..13], out=mout);
+    Screen(in=in, load=sload, address=address[0..12], out=sout);
+
+    Or8Way(in=address[0..7], out=or1);
+    Or8Way(in=address[5..12], out=or2);
+    Or(a=or1, b=or2, out=ksel);
+
+    Keyboard(out=kout);
+
+    Mux16(a=kout, b=false, sel=ksel, out=fout1);
+    Mux16(a=sout, b=fout1, sel=address[13], out=fout2);
+    Mux16(a=mout, b=fout2, sel=address[14], out=out);
+}
diff --git a/chips/Mux.hdl b/chips/Mux.hdl
new file mode 100644
index 0000000..aac2e36
--- /dev/null
+++ b/chips/Mux.hdl
@@ -0,0 +1,22 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Mux.hdl
+
+/** 
+ * Multiplexor:
+ * out = a if sel == 0
+ *       b otherwise
+ */
+
+CHIP Mux {
+    IN a, b, sel;
+    OUT out;
+
+    PARTS:
+    // Put your code here:
+    Not (in=sel, out=notsel);
+    And (a=a, b=notsel, out=aandnotsel);
+    And (a=sel, b=b, out=selandb);
+    Or (a=aandnotsel, b=selandb, out=out);
+}
diff --git a/chips/Mux16.hdl b/chips/Mux16.hdl
new file mode 100644
index 0000000..ff09c6b
--- /dev/null
+++ b/chips/Mux16.hdl
@@ -0,0 +1,34 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Mux16.hdl
+
+/**
+ * 16-bit multiplexor: 
+ * for i = 0..15 out[i] = a[i] if sel == 0 
+ *                        b[i] if sel == 1
+ */
+
+CHIP Mux16 {
+    IN a[16], b[16], sel;
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    Mux (a=a[0], b=b[0], sel=sel, out=out[0]);
+    Mux (a=a[1], b=b[1], sel=sel, out=out[1]);
+    Mux (a=a[2], b=b[2], sel=sel, out=out[2]);
+    Mux (a=a[3], b=b[3], sel=sel, out=out[3]);
+    Mux (a=a[4], b=b[4], sel=sel, out=out[4]);
+    Mux (a=a[5], b=b[5], sel=sel, out=out[5]);
+    Mux (a=a[6], b=b[6], sel=sel, out=out[6]);
+    Mux (a=a[7], b=b[7], sel=sel, out=out[7]);
+    Mux (a=a[8], b=b[8], sel=sel, out=out[8]);
+    Mux (a=a[9], b=b[9], sel=sel, out=out[9]);
+    Mux (a=a[10], b=b[10], sel=sel, out=out[10]);
+    Mux (a=a[11], b=b[11], sel=sel, out=out[11]);
+    Mux (a=a[12], b=b[12], sel=sel, out=out[12]);
+    Mux (a=a[13], b=b[13], sel=sel, out=out[13]);
+    Mux (a=a[14], b=b[14], sel=sel, out=out[14]);
+    Mux (a=a[15], b=b[15], sel=sel, out=out[15]);
+}
diff --git a/chips/Mux4Way16.hdl b/chips/Mux4Way16.hdl
new file mode 100644
index 0000000..a47dbae
--- /dev/null
+++ b/chips/Mux4Way16.hdl
@@ -0,0 +1,23 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Mux4Way16.hdl
+
+/**
+ * 4-way 16-bit multiplexor:
+ * out = a if sel == 00
+ *       b if sel == 01
+ *       c if sel == 10
+ *       d if sel == 11
+ */
+
+CHIP Mux4Way16 {
+    IN a[16], b[16], c[16], d[16], sel[2];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    Mux16 (a=a, b=b, sel=sel[0], out=out1);
+    Mux16 (a=c, b=d, sel=sel[0], out=out2);
+    Mux16 (a=out1, b=out2, sel=sel[1], out=out);
+}
diff --git a/chips/Mux8Way16.hdl b/chips/Mux8Way16.hdl
new file mode 100644
index 0000000..6c88945
--- /dev/null
+++ b/chips/Mux8Way16.hdl
@@ -0,0 +1,25 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Mux8Way16.hdl
+
+/**
+ * 8-way 16-bit multiplexor:
+ * out = a if sel == 000
+ *       b if sel == 001
+ *       etc.
+ *       h if sel == 111
+ */
+
+CHIP Mux8Way16 {
+    IN a[16], b[16], c[16], d[16],
+       e[16], f[16], g[16], h[16],
+       sel[3];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    Mux4Way16 (a=a, b=b, c=c, d=d, sel=sel[0..1], out=out1);
+    Mux4Way16 (a=e, b=f, c=g, d=h, sel=sel[0..1], out=out2);
+    Mux16 (a=out1, b=out2, sel=sel[2], out=out);
+}
diff --git a/chips/Not.hdl b/chips/Not.hdl
new file mode 100644
index 0000000..e8aac51
--- /dev/null
+++ b/chips/Not.hdl
@@ -0,0 +1,18 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Not.hdl
+
+/**
+ * Not gate:
+ * out = not in
+ */
+
+CHIP Not {
+    IN in;
+    OUT out;
+
+    PARTS:
+    // Put your code here:
+    Nand (a=in, b=in, out=out);
+}
diff --git a/chips/Not16.hdl b/chips/Not16.hdl
new file mode 100644
index 0000000..f24fdb0
--- /dev/null
+++ b/chips/Not16.hdl
@@ -0,0 +1,33 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Not16.hdl
+
+/**
+ * 16-bit Not:
+ * for i=0..15: out[i] = not in[i]
+ */
+
+CHIP Not16 {
+    IN in[16];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    Not (in=in[0], out=out[0]);
+    Not (in=in[1], out=out[1]);
+    Not (in=in[2], out=out[2]);
+    Not (in=in[3], out=out[3]);
+    Not (in=in[4], out=out[4]);
+    Not (in=in[5], out=out[5]);
+    Not (in=in[6], out=out[6]);
+    Not (in=in[7], out=out[7]);
+    Not (in=in[8], out=out[8]);
+    Not (in=in[9], out=out[9]);
+    Not (in=in[10], out=out[10]);
+    Not (in=in[11], out=out[11]);
+    Not (in=in[12], out=out[12]);
+    Not (in=in[13], out=out[13]);
+    Not (in=in[14], out=out[14]);
+    Not (in=in[15], out=out[15]);
+}
diff --git a/chips/Or.hdl b/chips/Or.hdl
new file mode 100644
index 0000000..f539fbf
--- /dev/null
+++ b/chips/Or.hdl
@@ -0,0 +1,21 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Or.hdl
+
+ /**
+ * Or gate:
+ * out = 1 if (a == 1 or b == 1)
+ *       0 otherwise
+ */
+
+CHIP Or {
+    IN a, b;
+    OUT out;
+
+    PARTS:
+    // Put your code here:
+    Not (in=a, out=nota);
+    Not (in=b, out=notb);
+    Nand (a=nota, b=notb, out=out);
+}
diff --git a/chips/Or16.hdl b/chips/Or16.hdl
new file mode 100644
index 0000000..4b46ec5
--- /dev/null
+++ b/chips/Or16.hdl
@@ -0,0 +1,33 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Or16.hdl
+
+/**
+ * 16-bit bitwise Or:
+ * for i = 0..15 out[i] = (a[i] or b[i])
+ */
+
+CHIP Or16 {
+    IN a[16], b[16];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    Or (a=a[0], b=b[0], out=out[0]);
+    Or (a=a[1], b=b[1], out=out[1]);
+    Or (a=a[2], b=b[2], out=out[2]);
+    Or (a=a[3], b=b[3], out=out[3]);
+    Or (a=a[4], b=b[4], out=out[4]);
+    Or (a=a[5], b=b[5], out=out[5]);
+    Or (a=a[6], b=b[6], out=out[6]);
+    Or (a=a[7], b=b[7], out=out[7]);
+    Or (a=a[8], b=b[8], out=out[8]);
+    Or (a=a[9], b=b[9], out=out[9]);
+    Or (a=a[10], b=b[10], out=out[10]);
+    Or (a=a[11], b=b[11], out=out[11]);
+    Or (a=a[12], b=b[12], out=out[12]);
+    Or (a=a[13], b=b[13], out=out[13]);
+    Or (a=a[14], b=b[14], out=out[14]);
+    Or (a=a[15], b=b[15], out=out[15]);
+}
diff --git a/chips/Or8Way.hdl b/chips/Or8Way.hdl
new file mode 100644
index 0000000..495972b
--- /dev/null
+++ b/chips/Or8Way.hdl
@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Or8Way.hdl
+
+/**
+ * 8-way Or: 
+ * out = (in[0] or in[1] or ... or in[7])
+ */
+
+CHIP Or8Way {
+    IN in[8];
+    OUT out;
+
+    PARTS:
+    // Put your code here:
+    Or (a=in[0], b=in[1], out=in01);
+    Or (a=in01, b=in[2], out=in02);
+    Or (a=in02, b=in[3], out=in03);
+    Or (a=in03, b=in[4], out=in04);
+    Or (a=in04, b=in[5], out=in05);
+    Or (a=in05, b=in[6], out=in06);
+    Or (a=in06, b=in[7], out=out);
+}
diff --git a/chips/PC.hdl b/chips/PC.hdl
new file mode 100644
index 0000000..aba68d1
--- /dev/null
+++ b/chips/PC.hdl
@@ -0,0 +1,32 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/a/PC.hdl
+
+/**
+ * A 16-bit counter with load and reset control bits.
+ * if      (reset[t] == 1) out[t+1] = 0
+ * else if (load[t] == 1)  out[t+1] = in[t]
+ * else if (inc[t] == 1)   out[t+1] = out[t] + 1  (integer addition)
+ * else                    out[t+1] = out[t]
+ */
+
+CHIP PC {
+    IN in[16],load,inc,reset;
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    Mux16 (a=out5, b=in, sel=load, out=out0);
+    Inc16 (in=out0, out=out1);
+    Mux16 (a=out1, b=out0, sel=load, out=out2);
+    Mux16 (a=out0, b=out2, sel=inc, out=out3);
+    Mux16 (a=out3, b=false, sel=reset, out=out4);
+    Register (in=out4, load=true, out=out5, out=out);
+
+    //Inc16 (in=out4, out=out0);
+    //Mux16 (a=out4, b=out0, sel=inc, out=out1);
+    //Mux16 (a=out1, b=in, sel=load, out=out2);
+    //Mux16 (a=out2, b=false, sel=reset, out=out3);
+    //Register (in=out3, load=true, out=out4, out=out);
+}
diff --git a/chips/RAM16K.hdl b/chips/RAM16K.hdl
new file mode 100644
index 0000000..9c6e89f
--- /dev/null
+++ b/chips/RAM16K.hdl
@@ -0,0 +1,25 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/b/RAM16K.hdl
+
+/**
+ * Memory of 16K registers, each 16 bit-wide. Out holds the value
+ * stored at the memory location specified by address. If load==1, then 
+ * the in value is loaded into the memory location specified by address 
+ * (the loaded value will be emitted to out from the next time step onward).
+ */
+
+CHIP RAM16K {
+    IN in[16], load, address[14];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    DMux4Way (in=load, sel=address[0..1], a=load0, b=load1, c=load2, d=load3);
+    RAM4K (in=in, load=load0, address=address[2..13], out=out0);
+    RAM4K (in=in, load=load1, address=address[2..13], out=out1);
+    RAM4K (in=in, load=load2, address=address[2..13], out=out2);
+    RAM4K (in=in, load=load3, address=address[2..13], out=out3);
+    Mux4Way16 (a=out0, b=out1, c=out2, d=out3, sel=address[0..1], out=out);
+}
diff --git a/chips/RAM4K.hdl b/chips/RAM4K.hdl
new file mode 100644
index 0000000..cfc2e4f
--- /dev/null
+++ b/chips/RAM4K.hdl
@@ -0,0 +1,29 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/b/RAM4K.hdl
+
+/**
+ * Memory of 4K registers, each 16 bit-wide. Out holds the value
+ * stored at the memory location specified by address. If load==1, then 
+ * the in value is loaded into the memory location specified by address 
+ * (the loaded value will be emitted to out from the next time step onward).
+ */
+
+CHIP RAM4K {
+    IN in[16], load, address[12];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    DMux8Way (in=load, sel=address[0..2], a=load0, b=load1, c=load2, d=load3, e=load4, f=load5, g=load6, h=load7);
+    RAM512 (in=in, load=load0, address=address[3..11], out=out0);
+    RAM512 (in=in, load=load1, address=address[3..11], out=out1);
+    RAM512 (in=in, load=load2, address=address[3..11], out=out2);
+    RAM512 (in=in, load=load3, address=address[3..11], out=out3);
+    RAM512 (in=in, load=load4, address=address[3..11], out=out4);
+    RAM512 (in=in, load=load5, address=address[3..11], out=out5);
+    RAM512 (in=in, load=load6, address=address[3..11], out=out6);
+    RAM512 (in=in, load=load7, address=address[3..11], out=out7);
+    Mux8Way16 (a=out0, b=out1, c=out2, d=out3, e=out4, f=out5, g=out6, h=out7, sel=address[0..2], out=out);
+}
diff --git a/chips/RAM512.hdl b/chips/RAM512.hdl
new file mode 100644
index 0000000..55f6ea0
--- /dev/null
+++ b/chips/RAM512.hdl
@@ -0,0 +1,29 @@
+// This file is part of the materials accompanying the book 
+// "The Elements of Computing Systems" by Nisan and Schocken, 
+// MIT Press. Book site: www.idc.ac.il/tecs
+// File name: projects/03/b/RAM512.hdl
+
+/**
+ * Memory of 512 registers, each 16 bit-wide. Out holds the value
+ * stored at the memory location specified by address. If load==1, then 
+ * the in value is loaded into the memory location specified by address 
+ * (the loaded value will be emitted to out from the next time step onward).
+ */
+
+CHIP RAM512 {
+    IN in[16], load, address[9];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    DMux8Way (in=load, sel=address[0..2], a=load0, b=load1, c=load2, d=load3, e=load4, f=load5, g=load6, h=load7);
+    RAM64 (in=in, load=load0, address=address[3..8], out=out0);
+    RAM64 (in=in, load=load1, address=address[3..8], out=out1);
+    RAM64 (in=in, load=load2, address=address[3..8], out=out2);
+    RAM64 (in=in, load=load3, address=address[3..8], out=out3);
+    RAM64 (in=in, load=load4, address=address[3..8], out=out4);
+    RAM64 (in=in, load=load5, address=address[3..8], out=out5);
+    RAM64 (in=in, load=load6, address=address[3..8], out=out6);
+    RAM64 (in=in, load=load7, address=address[3..8], out=out7);
+    Mux8Way16 (a=out0, b=out1, c=out2, d=out3, e=out4, f=out5, g=out6, h=out7, sel=address[0..2], out=out);
+}
diff --git a/chips/RAM64.hdl b/chips/RAM64.hdl
new file mode 100644
index 0000000..269adb1
--- /dev/null
+++ b/chips/RAM64.hdl
@@ -0,0 +1,29 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/a/RAM64.hdl
+
+/**
+ * Memory of 64 registers, each 16 bit-wide. Out holds the value
+ * stored at the memory location specified by address. If load==1, then 
+ * the in value is loaded into the memory location specified by address 
+ * (the loaded value will be emitted to out from the next time step onward).
+ */
+
+CHIP RAM64 {
+    IN in[16], load, address[6];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    DMux8Way (in=load, sel=address[0..2], a=load0, b=load1, c=load2, d=load3, e=load4, f=load5, g=load6, h=load7);
+    RAM8 (in=in, load=load0, address=address[3..5], out=out0);
+    RAM8 (in=in, load=load1, address=address[3..5], out=out1);
+    RAM8 (in=in, load=load2, address=address[3..5], out=out2);
+    RAM8 (in=in, load=load3, address=address[3..5], out=out3);
+    RAM8 (in=in, load=load4, address=address[3..5], out=out4);
+    RAM8 (in=in, load=load5, address=address[3..5], out=out5);
+    RAM8 (in=in, load=load6, address=address[3..5], out=out6);
+    RAM8 (in=in, load=load7, address=address[3..5], out=out7);
+    Mux8Way16 (a=out0, b=out1, c=out2, d=out3, e=out4, f=out5, g=out6, h=out7, sel=address[0..2], out=out);
+}
diff --git a/chips/RAM8.hdl b/chips/RAM8.hdl
new file mode 100644
index 0000000..2ea13a1
--- /dev/null
+++ b/chips/RAM8.hdl
@@ -0,0 +1,29 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/a/RAM8.hdl
+
+/**
+ * Memory of 8 registers, each 16 bit-wide. Out holds the value
+ * stored at the memory location specified by address. If load==1, then 
+ * the in value is loaded into the memory location specified by address 
+ * (the loaded value will be emitted to out from the next time step onward).
+ */
+
+CHIP RAM8 {
+    IN in[16], load, address[3];
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    DMux8Way (in=load, sel=address, a=load0, b=load1, c=load2, d=load3, e=load4, f=load5, g=load6, h=load7);
+    Register (in=in, load=load0, out=out0);
+    Register (in=in, load=load1, out=out1);
+    Register (in=in, load=load2, out=out2);
+    Register (in=in, load=load3, out=out3);
+    Register (in=in, load=load4, out=out4);
+    Register (in=in, load=load5, out=out5);
+    Register (in=in, load=load6, out=out6);
+    Register (in=in, load=load7, out=out7);
+    Mux8Way16 (a=out0, b=out1, c=out2, d=out3, e=out4, f=out5, g=out6, h=out7, sel=address, out=out);
+}
diff --git a/chips/Register.hdl b/chips/Register.hdl
new file mode 100644
index 0000000..f4ec7ee
--- /dev/null
+++ b/chips/Register.hdl
@@ -0,0 +1,34 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/a/Register.hdl
+
+/**
+ * 16-bit register:
+ * If load[t] == 1 then out[t+1] = in[t]
+ * else out does not change
+ */
+
+CHIP Register {
+    IN in[16], load;
+    OUT out[16];
+
+    PARTS:
+    // Put your code here:
+    Bit (in=in[0], load=load, out=out[0]);
+    Bit (in=in[1], load=load, out=out[1]);
+    Bit (in=in[2], load=load, out=out[2]);
+    Bit (in=in[3], load=load, out=out[3]);
+    Bit (in=in[4], load=load, out=out[4]);
+    Bit (in=in[5], load=load, out=out[5]);
+    Bit (in=in[6], load=load, out=out[6]);
+    Bit (in=in[7], load=load, out=out[7]);
+    Bit (in=in[8], load=load, out=out[8]);
+    Bit (in=in[9], load=load, out=out[9]);
+    Bit (in=in[10], load=load, out=out[10]);
+    Bit (in=in[11], load=load, out=out[11]);
+    Bit (in=in[12], load=load, out=out[12]);
+    Bit (in=in[13], load=load, out=out[13]);
+    Bit (in=in[14], load=load, out=out[14]);
+    Bit (in=in[15], load=load, out=out[15]);
+}
diff --git a/chips/Xor.hdl b/chips/Xor.hdl
new file mode 100644
index 0000000..5ec4579
--- /dev/null
+++ b/chips/Xor.hdl
@@ -0,0 +1,22 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/01/Xor.hdl
+
+/**
+ * Exclusive-or gate:
+ * out = not (a == b)
+ */
+
+CHIP Xor {
+    IN a, b;
+    OUT out;
+
+    PARTS:
+    // Put your code here:
+    Not (in=a, out=nota);
+    Not (in=b, out=notb);
+    And (a=a, b=notb, out=aandnotb);
+    And (a=nota, b=b, out=notaandb);
+    Or (a=aandnotb, b=notaandb, out=out);
+}
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