From 4584283403948cc6d1bd49a83e0fca47a58f8e9f Mon Sep 17 00:00:00 2001 From: Yuchen Pei Date: Thu, 7 Dec 2017 16:38:00 +0100 Subject: almost finished project 3 --- projects/03/b/RAM4K.hdl | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'projects/03/b/RAM4K.hdl') diff --git a/projects/03/b/RAM4K.hdl b/projects/03/b/RAM4K.hdl index 1cee633..cfc2e4f 100644 --- a/projects/03/b/RAM4K.hdl +++ b/projects/03/b/RAM4K.hdl @@ -16,4 +16,14 @@ CHIP RAM4K { PARTS: // Put your code here: -} \ No newline at end of file + DMux8Way (in=load, sel=address[0..2], a=load0, b=load1, c=load2, d=load3, e=load4, f=load5, g=load6, h=load7); + RAM512 (in=in, load=load0, address=address[3..11], out=out0); + RAM512 (in=in, load=load1, address=address[3..11], out=out1); + RAM512 (in=in, load=load2, address=address[3..11], out=out2); + RAM512 (in=in, load=load3, address=address[3..11], out=out3); + RAM512 (in=in, load=load4, address=address[3..11], out=out4); + RAM512 (in=in, load=load5, address=address[3..11], out=out5); + RAM512 (in=in, load=load6, address=address[3..11], out=out6); + RAM512 (in=in, load=load7, address=address[3..11], out=out7); + Mux8Way16 (a=out0, b=out1, c=out2, d=out3, e=out4, f=out5, g=out6, h=out7, sel=address[0..2], out=out); +} -- cgit v1.2.3