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author | Yuchen Pei <hi@ypei.me> | 2022-01-30 17:16:36 +1100 |
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committer | Yuchen Pei <hi@ypei.me> | 2022-01-30 17:16:36 +1100 |
commit | 3eb04547355c49b986e884e028652ac50762089b (patch) | |
tree | a94ea4b0f02d98a88ac4ad0f16863db20a027bbd /Assembler.hs | |
parent | 4ae42daaca0fb7c909f736997f227c51a48f6c7b (diff) |
minor editspublic
Diffstat (limited to 'Assembler.hs')
-rw-r--r-- | Assembler.hs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Assembler.hs b/Assembler.hs index ca79a48..47959ea 100644 --- a/Assembler.hs +++ b/Assembler.hs @@ -80,12 +80,15 @@ stripJunk xs = filter (not . null) $ (filter (not . (flip elem " \t")) . head . stripLabels :: [[Char]] -> [[Char]] stripLabels = filter (not . (elem '(')) +-- For labels addLabels :: [[Char]] -> Int -> Map [Char] [Char] -> Map [Char] [Char] addLabels [] _ table = table addLabels ((hd:tl):rest) addr table | hd == '(' = addLabels rest addr (Map.insert (init tl) (int2Bin16 addr) table) | otherwise = addLabels rest (addr + 1) table +-- For variables, addr is the current instruction address, vaddr is the +-- variable memory address (to be assigned) addSyms :: [[Char]] -> Int -> Int -> Map [Char] [Char] -> Map [Char] [Char] addSyms [] _ _ table = table addSyms ((hd:tl):rest) addr vaddr table |