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authorYuchen Pei <me@ypei.me>2017-12-08 13:51:31 +0100
committerYuchen Pei <me@ypei.me>2017-12-08 13:51:31 +0100
commit7ce33ecd1734f5a83afb55b8311b541d17cbbd6f (patch)
tree86a01b23460f5f5bd2d719026acd823a1d00dbfe /projects/03/a/PC.hdl
parent4584283403948cc6d1bd49a83e0fca47a58f8e9f (diff)
finished project 3
Diffstat (limited to 'projects/03/a/PC.hdl')
-rw-r--r--projects/03/a/PC.hdl16
1 files changed, 12 insertions, 4 deletions
diff --git a/projects/03/a/PC.hdl b/projects/03/a/PC.hdl
index 817ff67..aba68d1 100644
--- a/projects/03/a/PC.hdl
+++ b/projects/03/a/PC.hdl
@@ -17,8 +17,16 @@ CHIP PC {
PARTS:
// Put your code here:
- Register (in=in, load=load, out=regout);
- Inc16 (in=regout, out=incout);
- Mux16 (a=incout, b=regout, sel=load, out=regincout);
- Mux16 (a=regout, b=false, sel=reset, out=out);
+ Mux16 (a=out5, b=in, sel=load, out=out0);
+ Inc16 (in=out0, out=out1);
+ Mux16 (a=out1, b=out0, sel=load, out=out2);
+ Mux16 (a=out0, b=out2, sel=inc, out=out3);
+ Mux16 (a=out3, b=false, sel=reset, out=out4);
+ Register (in=out4, load=true, out=out5, out=out);
+
+ //Inc16 (in=out4, out=out0);
+ //Mux16 (a=out4, b=out0, sel=inc, out=out1);
+ //Mux16 (a=out1, b=in, sel=load, out=out2);
+ //Mux16 (a=out2, b=false, sel=reset, out=out3);
+ //Register (in=out3, load=true, out=out4, out=out);
}