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authorYuchen Pei <me@ypei.me>2017-12-06 16:32:34 +0100
committerYuchen Pei <me@ypei.me>2017-12-06 16:32:34 +0100
commit317270a4daf0bfa6ee1f287a3150f3f752d28391 (patch)
tree5add14d5147aacfb41a21c144adec79cc0b61abe /projects/03/a/RAM8.hdl
parentd4e7065850203ff97a1046615644f9a6f73eb523 (diff)
working through project 3
- reached RAM8
Diffstat (limited to 'projects/03/a/RAM8.hdl')
-rw-r--r--projects/03/a/RAM8.hdl12
1 files changed, 11 insertions, 1 deletions
diff --git a/projects/03/a/RAM8.hdl b/projects/03/a/RAM8.hdl
index 4c0e070..8b25522 100644
--- a/projects/03/a/RAM8.hdl
+++ b/projects/03/a/RAM8.hdl
@@ -16,4 +16,14 @@ CHIP RAM8 {
PARTS:
// Put your code here:
-} \ No newline at end of file
+ DMux8Way (in=load, sel=address, out=loads);
+ Register (in=in, load=loads[0], out=outs[0]);
+ Register (in=in, load=loads[1], out=outs[1]);
+ Register (in=in, load=loads[2], out=outs[2]);
+ Register (in=in, load=loads[3], out=outs[3]);
+ Register (in=in, load=loads[4], out=outs[4]);
+ Register (in=in, load=loads[5], out=outs[5]);
+ Register (in=in, load=loads[6], out=outs[6]);
+ Register (in=in, load=loads[7], out=outs[7]);
+ Mux8Way(in=outs, sel=address, out=out);
+}