rearranged the dir for github

- removed tools and pdfs
- rearranged the projects dirs
- added md files
- other minor changes

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diff --git a/projects/02/ALU.hdl b/projects/02/ALU.hdl
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-// This file is part of www.nand2tetris.org

-// and the book "The Elements of Computing Systems"

-// by Nisan and Schocken, MIT Press.

-// File name: projects/02/ALU.hdl

-

-/**

- * The ALU (Arithmetic Logic Unit).

- * Computes one of the following functions:

- * x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,

- * x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs, 

- * according to 6 input bits denoted zx,nx,zy,ny,f,no.

- * In addition, the ALU computes two 1-bit outputs:

- * if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;

- * if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.

- */

-

-// Implementation: the ALU logic manipulates the x and y inputs

-// and operates on the resulting values, as follows:

-// if (zx == 1) set x = 0        // 16-bit constant

-// if (nx == 1) set x = !x       // bitwise not

-// if (zy == 1) set y = 0        // 16-bit constant

-// if (ny == 1) set y = !y       // bitwise not

-// if (f == 1)  set out = x + y  // integer 2's complement addition

-// if (f == 0)  set out = x & y  // bitwise and

-// if (no == 1) set out = !out   // bitwise not

-// if (out == 0) set zr = 1

-// if (out < 0) set ng = 1

-

-CHIP ALU {

-    IN  

-        x[16], y[16],  // 16-bit inputs        

-        zx, // zero the x input?

-        nx, // negate the x input?

-        zy, // zero the y input?

-        ny, // negate the y input?

-        f,  // compute out = x + y (if 1) or x & y (if 0)

-        no; // negate the out output?

-

-    OUT 

-        out[16], // 16-bit output

-        zr, // 1 if (out == 0), 0 otherwise

-        ng; // 1 if (out < 0),  0 otherwise

-

-    PARTS:

-   // Put you code here:

-    Mux16 (a=x, b[0..15]=false, sel=zx, out=x1);

-    Not16 (in=x1, out=notx1);

-    Mux16 (a=x1, b=notx1, sel=nx, out=x2);

-    Mux16 (a=y, b[0..15]=false, sel=zy, out=y1);

-    Not16 (in=y1, out=noty1);

-    Mux16 (a=y1, b=noty1, sel=ny, out=y2);

-    Add16 (a=x2, b=y2, out=x2py2);

-    And16 (a=x2, b=y2, out=x2ay2);

-    Mux16 (a=x2ay2, b=x2py2, sel=f, out=xy);

-    Not16 (in=xy, out=notxy);

-    Mux16 (a=xy, b=notxy, sel=no, out=out, out[0..7]=out1, out[8..15]=out2, out[15]=msbout);

-    Or8Way (in=out1, out=z1);

-    Or8Way (in=out1, out=z2); //some potential pitfall w.r.t. subbusing see https://www.coursera.org/learn/build-a-computer/discussions/weeks/2/threads/9VYr3LzkEeeK2BJ0oEsgKA

-    Or (a=z1, b=z2, out=z);

-    Not (in=z, out=zr);

-    And (a=msbout, b=true, out=ng);

-}